On this page
Research Article | Open Access
Volume 14 2022 | None
DRAM MEMORY BASED DEEP DRIVEN ARCHITECTURE WITH REDUCED LOGICAL SPACE
Niveditha.P.V,Priyadharshini.A,Rithika.S,Geethabala ,Yesodha.M
Pages: 424-431
Abstract
Testing is the major bottleneck in all product development. The challenge of testing electronic systems to grow rapidly over the last decade. The complexity of large designs is increasing substantially, at the same time the technology feature sizes are decreasing. A circuit needs to be tested to conform the specifications. Testing of hardware is performed for two purposes to ensure the functionality and to ensure the absence of process faults
Keywords
Built-in-self-test (BIST), fault tolerance, modelsim software, random access memory (RAM), testing
PDF
99
Views
18
Downloads